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About VLSI Design Methodology Development
Product Description The Complete, Modern Tutorial on Practical VLSI Chip Design, Validation, and Analysis As microelectronics engineers design complex chips using existing circuit libraries, they must ensure correct logical, physical, and electrical properties, and prepare for reliable foundry fabrication. VLSI Design Methodology Development focuses on the design and analysis steps needed to perform these tasks and successfully complete a modern chip design. Microprocessor design authority Tom Dillinger carefully introduces core concepts, and then guides engineers through modeling, functional design validation, design implementation, electrical analysis, and release to manufacturing. Writing from the engineer’s perspective, he covers underlying EDA tool algorithms, flows, criteria for assessing project status, and key tradeoffs and interdependencies. This fresh and accessible tutorial will be valuable to all VLSI system designers, senior undergraduate or graduate students of microelectronics design, and companies offering internal courses for engineers at all levels. Reflect complexity, cost, resources, and schedules in planning a chip design project Perform hierarchical design decomposition, floorplanning, and physical integration, addressing DFT, DFM, and DFY requirements Model functionality and behavior, validate designs, and verify formal equivalency Apply EDA tools for logic synthesis, placement, and routing Analyze timing, noise, power, and electrical issues Prepare for manufacturing release and bring-up, from mastering ECOs to qualification This guide is for all VLSI system designers, senior undergraduate or graduate students of microelectronics design, and companies offering internal courses for engineers at all levels. It is applicable to engineering teams undertaking new projects and migrating existing designs to new technologies. From the Back Cover The complete practical tutorial on chip design, validation, and analysis for advanced process technologies Clear, accessible, and focused on the practical issues today’s chip designers face: from IP integration to working with foundries Includes current coverage of challenges associated with advanced nanometer processes technologies, including power supply noise, signal integrity, and on-chip parameter variations For senior undergraduate and graduate students of microelectronics design, junior engineers, and experienced engineers migrating designs to new technologies By Tom Dillinger, chip designer at Oracle, IBM, and AMD, and one of the field’s leading experts About the Author Thomas Dillin ger has more than 30 years of experience in the microelectronics industry, including semiconductor circuit design, fabrication process research, and EDA tool development. He has been responsible for the design methodology development for ASIC, SoC, and complex microprocessor chips for IBM, Sun Microsystems/Oracle, and AMD. He is the author of the book VLSI Engineering and has written for SemiWiki.
